p p jq1900 august 28 ,2015 - rev.00 page 1 2 0 v n - c hannel enhancement mode mosfet voltage 2 0 v current 1. 2 a dfn 3l unit: inch(mm) f eatures ? low voltage d rive (1.2v) . ? advanced trench process technology ? specially designed for switch load, pwm applic ation, etc. ? esd protected ? lead free in compliance wit h eu rohs 2011/65/eu directive . ? green molding compound as per iec61249 std. (halogen free) mechanical data ? case: dfn 3l package ? terminals: solderable per mil - std - 750, method 2026 ? approx. weight: 0.0 0 00 4 ounces, 0 .00 11 grams ? marking: 0 parameter symbol limit units drain - source voltage v ds 2 0 v gate - source voltage v gs + 10 v continuous drain current t a =25 o c i d 1.2 a t sp =25 o c (note 3 ) 2.0 pulsed drain current , tp < 10us i dm 4.0 a power diss ipation t a =25 o c p d 9 00 m w derate above 25 o c 7.2 m w/ o c operatin g junction an d storage temperature range t j ,t stg - 55~150 o c typical thermal resistance - j unction to ambient , t<10s (note 4 ) r j a 1 3 9 o c /w maximum ratings and thermal characteristics (t a =25 o c unless otherwise noted)
p p jq1900 august 28 ,2015 - rev.00 page 2 e lectrical c haracteristics (t a =25 o c unless otherwise noted) parameter symbol test condition min. typ. max. units static drain - source breakdown voltage b v dss v gs = 0 v, i d = 25 0ua 2 0 - - v gate threshold voltage v gs(th) v ds =v gs , i d = 250 ua 0. 3 0.65 0.9 v drain - source on - state resistance r ds(on) v gs = 4.5 v, i d = 6 00m a - 300 400 m gs = 2.5 v, i d = 200m a - 3 5 0 650 v gs = 1.8 v, i d = 100m a - 400 800 v gs = 1.5 v, i d = 50m a - 500 1200 v gs = 1.2 v, i d = 20m a - 100 0 3000 zero gate voltage drain current i dss v ds = 16 v, v gs =0v - - 1 u a gate - source leakage current i gss v gs = + 8 v, v ds =0v - + 0. 5 + 10 u a dynamic (note 6 ) total gate charge q g v ds = 10 v, i d = 3 00m a, v gs = 4.5v (note 2 ) - 1.4 - nc gate - source charge q gs - 0.22 - gate - drain charge q gd - 0.21 - input capacitance ciss v ds = 1 0 v, v gs = 0 v, f=1.0mhz - 6 7 - pf output capacitance coss - 19 - reverse transfer capacitance crss - 6 - turn - on delay time t d (on) v dd = 10 v, i d =150m a , v g s = 4.0 v, r g = 10 (note 1 , 2 ) - 2.8 - ns turn - on rise time tr - 20 - turn - o ff delay time t d (off) - 23 - turn - o ff fall time tf - 2 3 - drain - source diode maximum continuous drain - source diode forward current i s --- - - 3 00 m a diode forward volt age v sd i s = 300m a, v gs = 0 v - 0. 8 7 1. 3 v notes : 1. pulse width < 300us, duty cycle < 2% 2. essentially independent of operating temperature typical characteristics . 3. tsp is the temperature at the soldering point of the source lead . 4. r ? ja is the sum of the junction - to - case and case - to - ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins m ounted on a 1 inch fr - 4 with 2oz . square pad of copper . 5. the maximum current rating is package limited 6. guaranteed by de sign, not subject to product ion testing.
p p jq1900 august 28 ,2015 - rev.00 page 3 t ypical characteristic curves fig.1 on - region characteristics fig. 2 transfer characteristics fig. 3 on - resistance vs. drain current fig. 4 on - resistance vs. junction temperature fig. 5 on - resistance variation with vgs. fig. 6 body d i ode characteristics
p p jq1900 august 28 ,2015 - rev.00 page 4 t ypical characteristic curves fig. 7 gate - charge characteristics fig. 8 threshold voltage variation with temperature . fig. 9 capacitance vs. drain - source voltage.
p p jq1900 august 28 ,2015 - rev.00 page 5 part no packing code version mounting pad layout p art n o packing code package type packing type marking ver sion pj q190 0 _ r 1_000 01 dfn 3l 8 k pcs / 7
p p jq1900 august 28 ,2015 - rev.00 page 6 disclaimer
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